Wei Huang
Wei Huang (黄维)
The Chinese University of Hong Kong
huangwei8361@qq.com huangwei0001@link.cuhk.edu.cn

About

I'm a CS student focusing on AI, with a B.Eng in CS from Harbin Institute of Technology, Shenzhen, majoring in Computer Science and Technology, and currently pursuing a CS master's at CUHK.

once worked as an intern in the AI Agents R&D team at Tencent Technologyhref="https://www.tencent.com/" target="_blank">.

Click to view my CV

Research Interests

  • Deep Learning & Computer Vision
  • Multi-modal Models (Vision-Language)
  • Video Understanding & Action Recognition
  • VR/AR & Human-Computer Interaction

Education

Harbin Institute of Technology, Shenzhen
  • B.Eng. in Computer Science and Technology
  • Sept. 2021 - July 2025 (Expected)
  • GPA: 87/100
The Chinese University of Hong Kong
  • M.Sc. in Computer Science
  • Aug. 2025 - Jul. 2026 (Expected)

Experiences

Apr. 2025 - Sept. 2025
Engaged in end-to-end development of large-scale internal Multi-Agent systems
  • Engineered Agent services using ByteDance's Eino framework (Go) with LLM + MCP + RAG architecture
  • Developed comprehensive evaluation framework with LLM-as-a-judge methodologies
  • Contributed to open-source model deployment, performance evaluation, and RAG optimization
  • Product collaboration
Location: Shenzhen, China

Research & Projects

Multi-modal Open-Vocabulary Video Action Recognition
Research Project
MLLM Research

• Adapted pre-trained CLIP model for video action recognition
• Enhanced fine-grained perception and temporal dynamics optimization
• Reproduced SOTA papers: FROSTER, OpenVCLIP, AWT
• Technologies: PyTorch, SlowFast, MMAction2, ViT architectures

Interactive GUI Element Prediction and Cybersickness Detection in VR
Research Project
VR/AR Research

• Developed Python scripts for VR user data acquisition and analysis
• Implemented baseline models for GUI element prediction
• Domain adaptation of SOTA models (OmniParser, CogAgent) for VR tasks
• Organized offline user studies for cybersickness detection

RISC-V Single-Core Pipelined CPU and SoC Design
Hardware Design Project
Featured in Outstanding Design Showcase • Perfect Score

• Designed single-cycle and pipelined CPUs based on RISC-V ISA
• Implemented using Verilog and Vivado
• Achieved full functionality on FPGA board
• Project featured in college's outstanding design showcase

Local Search Engine Development with Python
Software Engineering Project
Information Retrieval & NLP

• Built search engine from scratch with complete IR pipeline
• Implemented corpus preprocessing, index construction, search logic
• Developed simple UI for user interaction
• Authored technical paper on related IR and NLP topics

Honors & Awards

Academic Awards

  • Second Prize (Top 10%), Huawei Cloud & HIT APP Design Contest
  • University-level "Excellent League Cadre"
  • University-level "Excellent League Member"

Leadership

  • President, University-Level Student Club
    • Managed and coordinated affairs for a club of approximately 300 members
    • Led collaborations with university departments and managed publicity efforts
    • Organized numerous highly-praised events
    • Led club to win multiple university-level honors, including "Outstanding Student Club"

Technical Skills

Programming Languages

  • Python
  • Java
  • Go
  • Verilog

Developer Tools

  • Git
  • Vivado
  • Android Studio
  • Docker

Frameworks & Libraries

  • PyTorch
  • MMAction2
  • SlowFast
  • Eino Framework

Technical Fields

  • Deep Learning
  • Computer Vision
  • Natural Language Processing
  • Multi-modal Models
  • Video Understanding
  • RAG & Multi-Agent Systems